
RISC-V and MicroLED Silicon Photonics Technology Converge, CEA Collaborates with PSMC to Drive New Breakthroughs in AI Chip 3D Stacking The integration of RISC-V architecture with MicroLED silicon photonics technology marks a significant advancement in the field of AI chip development. In a collaborative effort, the French Alternative Energies and Atomic Energy Commission (CEA) has partnered with the Pacific Semiconductor Manufacturing Company (PSMC) to push forward innovations in 3D stacking for AI chips. This partnership aims to leverage the strengths of RISC-V's open-source instruction set architecture and the high-performance capabilities of MicroLED-based silicon photonics to enhance the efficiency, speed, and scalability of next-generation AI hardware. By combining these cutting-edge technologies, the collaboration is expected to enable more compact, energy-efficient, and powerful AI processing units. The project also focuses on advanced 3D integration techniques, including through-silicon vias (TSVs) and heterogeneous stacking, to achieve superior performance and reduced power consumption. These technical advancements are critical for supporting the growing demands of artificial intelligence applications, such as real-time data processing and high-speed computing. Through this strategic alliance, CEA and PSMC are setting new benchmarks in the development of AI chip architectures, paving the way for future innovations in semiconductor technology.
CEA-Leti has partnered with PSMC to integrate the RISC-V architecture with MicroLED silicon photonics technology into 3D-stacked chips, driving advancements in AI chip development. The project achieves high-performance, low-power integration, with data transmission rates exceeding 100 TB/s, expanding applications in edge computing and autonomous driving. Domestic company Guangpu Electronics has extensive experience in the MicroLED field, offering a reference for the practical implementation of this technology.
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